Responsibilities:

• As a creative engineer with a knowledge of subsystems and SoCs, you will owning and leading validating IP validation methodology for subsystems/solutions related to DDR5 or equivalent experience
• Work with project team to understand, review the SoC solution architecture and work on developing an end-end plan for DDR-5 starting from verification, continuing to emulation and then to post-silicon validation
• Key responsibilities will include owning the validation plan, debug methodology, developing and performing the test content, finding bugs, and running various validation checks
• Expected to own and lead to enhance the validation methodologies used by the team. Work closely with board team, equipment vendors, systems teams and others to develop a robust DDR validation methodology
• Will guide other members of the team as needed to enable the successful completion of project activities.

Required Skills and Experience :

• 15+ Yrs of Experience
• Bachelors (BS) or Masters (MS/MSc) in Electronics, Electrical or Computer Engineering - although other degrees will be considered with relevant work experience
• Knowledge of DDR-4/5 or other high speed protocols is a must!
• You will need experience of silicon validation for sophisticated SoCs and ASIC products.
• Your ability to make trade-offs between power, performance and area will be vital
• You possess the knowledge of Validation test content using C, C++ etc.
• Exposure to all stages of Silicon Validation will be crucial, including use-case validation.
• Exposure to producing validation specifications and documentation describing sophisticated designs
• Ability to work under time-scale pressure and meet ambitious targets without compromising on quality
• Understanding of the fundamentals of computer architecture and systems
• Practical experience of working on Processor based system designs!
• Knowledge of shell programming/scripting (e.g. Tcl Perl, Python etc.)